magistrsko delo
Lucija Župevc (Author), Mitja Nemec (Mentor)

Abstract

Razvoj močnostne elektronike in široka dostopnost polprevodnikov sta omogočila testiranje različnih topologij pretvornikov za napajanje ter vodenje električnih strojev. Paralelna topologija pretvornikov z delitvijo toka po paralelnih vejah omogoča manjšo tokovno obremenitev komponent, manjšo prostornino pasivnih elementov in manjše tokovne izgube. Poleg tega v sistem vnaša redundanco, kar izboljša učinkovitost delovanja. Precej raziskana in v industriji že uporabljana je visoko paralelizirana topologija na področju enosmernih presmernikov (DC-DC pretvornikov). Na področju razsmernikov (DC-AC pretvornikov) se paralelna topologija razvija predvsem v obliki večfaznih pretvornikov za večfazne električne stroje. Visoko paralelizirana topologija na področju trifaznih pretvornikov še nima dobro raziskanih rešitev, zato smo v sklopu tega magistrskega dela naredili in analizirali testni visoko paraleliziran napajalnik za vodenje trifaznega stroja. Razvoj napajalnika je združeval obravnavo več področij. Sinhronizacija je izvedena s PLL regulacijo faznega zamika med referenčnim in sinhronizacijskim signalom. Sinhronska serijska komunikacija temelji na verigi podrejenih naprav. Za učinkovito komunikacijo je bil razvit poseben komunikacijski paket in razpored pošiljanja. Regulacija temelji na teoriji orientacije polja. Večinski del izdelave napajalnika je predstavljalo programiranje v programskem okolju Code Composer Studio. Število paralelnih vej napajalnika in njihova fazna zamaknjenost vpliva na valovitost skupnega faznega toka. S spektralno analizo fazno zamaknjenega delovanja pretvornikov je ugotovljeno, da se vsebnost višjih harmonikov stikalne frekvence s povečevanjem paralelnih vej zmanjšuje. Izboljšanje ne raste premo sorazmerno s številom vej, zato lahko zaključimo, da je optimalno število vej 3-4. Kljub tej ugotovitvi je povečanje števila paralelnih vej pri določenih aplikacijah najlažji način za dvig izhodne moči.

Keywords

razsmernik;močnostni pretvornik;paralelna topologija;veriga podrejenih naprav;magisteriji;

Data

Language: Slovenian
Year of publishing:
Typology: 2.09 - Master's Thesis
Organization: UL FE - Faculty of Electrical Engineering
Publisher: [L. Župevc]
UDC: 621.313/.314(043.3)
COBISS: 150319619 Link will open in a new window
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Downloads: 14
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Other data

Secondary language: English
Secondary title: Highly parallel three phase inverter
Secondary abstract: The evolution of power electronics and the wide availability of semiconductors allow researchers to test different power converter topologies for powering and controlling electrical machines. The parallel topology of power converters, which divides current into more branches, reduces load currents of the components, the volume of passive elements and current losses. Redundancy is added to the system, and efficiency is increased. High parallel topologies of DC-DC converters are well-researched and already used in the industry. The development of parallel topologies of DC-AC inverters is focused more on multiphase converters for multiphase electrical machines. The high parallel topology of three phase converter does not have a lot of known solutions. Therefore, one high parallel three-phase converter was made and analysed as the object of this paper. The development of a power converter combines different fields. Synchronization is made by PLL regulation of phase shift between the reference and synchronising signals. Synchronous serial communication is used in Daisy Chain configuration. For efficient communication, a special communication package and transmission algorithm were created. Regulation is based on field-oriented control. Programming in Code Composer Studio presented most of the work. The number of converter’s parallel branches and their phase shift affects the total phase current ripple. Spectral analysis shows that the number of parallel branches reduces higher switching frequency harmonics when working in phase-shifted mode. Improvement does not increase proportionally with the number of branches. We can conclude that the optimal number of parallel branches for a such system is 3-4. Despite that, for some applications increasing the number of parallel branches is the fastest solution to increase output power.
Secondary keywords: inverter;power converter;parallel topology;Daisy Chain;
Type (COBISS): Master's thesis/paper
Study programme: 1000316
Embargo end date (OpenAIRE): 1970-01-01
Thesis comment: Univ. v Ljubljani, Fak. za elektrotehniko
Pages: XI, 99 str.
ID: 18648240